The global semiconductor leader TSMC has made a breakthrough in packaging. In fact, this was the founder Zhang Zhongmou set the tone in 2011. TSMC wanted to enter the packaging field. For the semiconductor industry at that time, it was equivalent to dropping a bomb, and for the packaging and testing industry, it was equivalent to customers scrambling for jobs.
The first product of TSMC in packaging and testing is called "CoWoS" (Chip on Wafer on Substrate), which means putting logic chips and DRAM on a silicon interposer and then encapsulating them on a substrate. The inventor is Yu Zhenhua, deputy director of R&D of TSMC, who won the Presidential Science Award.
TSMC's advanced packaging varies depending on each application product. GPU (drawing processor) and other processors use CoWoS 2.5D packaging technology. CoWoS mainly locks in high-end chips with low quantity and precision. It is expected that CoWoS technology will add silicon interposer option with 2 times the size of a double-shrink mask to meet customer needs.
It is estimated that TSMC's monthly production capacity has expanded from the previous 70K to 200K, which is higher than the total of other outsourced packaging and testing foundry manufacturers.
In April this year, TSMC published a number of new packaging technologies in the US technology forum, including integrated fan-out packaging (InFO PoP), multi-wafer stack (WoW, Wafer-on-Wafer) packaging technology, and system-on-integrated chip (SoICs, system-on-integrated-chips) packaging technology, allowing TSMC not only to take the lead in packaging, but also to gain a leading position in the market.
semiconductor industry pointed out that TSMC Longtan Advanced Packaging Factory is the base camp of InFO, and its main customer is Apple, with an estimated monthly production capacity of nearly 100,000 pieces. As the process shrinks, TSMC develops packaging technology on its own, significantly reducing the thickness of mobile phone processor packaging by more than 30%. It has also received orders for three generations of Apple in succession. High-end wafer foundry combined with advanced packaging will be TSMC's strengths to serve customers. The
supply chain has also been reported. HiSilicon, an IC designer under Huawei , will be the first to import WoW packaging and combine HBM's high-end chips. However, TSMC has not commented on market rumors, progress and specific products.
Yu Zhenhua also said in the packaging test forum at the recently-recent International Semiconductor Exhibition that TSMC does not directly compete with packaging factories and each has its own strengths. He emphasized that no matter which packaging technology is, innovation and leverage are very important in the process of R&D, but a company invests in R&D, and of course it is expected to be more and more widely used in the future.
As for TSMC's active entry into high-end packaging, the packaging and testing industry generally believes that the market and products are separated. TSMC is biased towards high-end, and its investment costs and prices are also relatively high. It has no repeated investments with most professional packaging and testing factories, nor has it competitive; Sun and Moonlight Investment Control believes that TSMC has also joined the packaging market and can make the cake bigger together.
. Cai Dugong, chairman of the global packaging giant Licheng, said that when Moore's Law reaches a limit, the wafer factory must swim downwards, and the packaging and testing factory must swim upwards, and maybe they meet together at somewhere (somewhere they meet together). This is a natural industrial development and a challenge for both sides.
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