Editor's note: Richard, a senior former analyst, deeply analyzes TSMC from the perspectives of financial, technical, and competitiveness analysis. The Science and Technology News has obtained exclusive authorization and 4 special articles to take you to know this important semico

2025/07/0619:15:36 hotcomm 1503

Editor's note: Richard, a senior former analyst, deeply analyzes TSMC from the perspectives of financial, technical, and competitiveness analysis. The Science and Technology News has obtained exclusive authorization and 4 special articles to take you to know this important semiconductor giant in Taiwan. The previous article has analyzed TSMC's financial aspects, and this article will tell its technical aspects. The

10nm process was in the end-2016 three-strong showdown

. Facing Samsung LSI step by step in advanced process technology, TSMC has changed the previous R&D unit to complete a process (technology node) and handed over to the manufacturing department to develop the next process process. It directly uses two teams to develop parallel research and development, and develop 10nm and 7nm processes at the same time, instead of waiting for 10nm to complete and then 7nm. This is also the claim that TSMC will take nearly two years from 16nm to 10nm, but it is expected to take only 5 seasons from 10nm to 7nm. The current progress is expected to be mass-produced by 10nm in end-2016, early-2017 waffer out.

The 10nm process technology developed by TSMC is compared with 16nm FinFET+. At the same power consumption, the chip products made by 10nm are 20% faster, and at the same speed, the power consumption is 40% less, and gate density is 2.1X of 16nm FinFET+. It is expected that 4Q15 will verify process quality, 1Q16~2Q16 customer products tape out, Late-4Q16 mass production (or Early-1Q17 initial), and 1Q17 shipments.

Although 10nm from TSMC, Samsung LSI and Intel are currently expected to be mass-produced in end-2016, Intel may import new all-around gates at 10nm. TSMC and Samsung LSI still use 3D FinFETs. If the three companies have no delays and successfully mass-produced 10nm in end-2016, Intel's technology is still one step ahead.

From the perspective of technological development, the 10nm cost and performance improvements are larger than 22 / 20nm to 14 / 16nm.
has been declining at 10nm for the first time since 28nm.

LAM Research predicts that end-2018, the 10nm production capacity of the foundry industry will grow to 140~150K/m. It can be imagined that 10nm will be a very important war, and it will be the first "front", "at the same time" and "basic close" showdown between TSMC and Samsung LSI, because:

45nm to 32/28nm, Samsung LSI and Apple are mutually beneficial, TSMC has not really joined the competition, TSMC takes all Apple AP orders as soon as it takes 20nm, but Samsung gave up 22/20nm (only making its own products) and jumped directly to 14nm and defeated TSMC 16nm (at least in terms of time). These generations are more like the use of business strategies, unlike the head-on battle.
for the first time, TSMC and Samsung LSI have the next generation of 10nm process technology, with similar production time (end-2016), and the technical direction is also similar, allowing customers to compare well. Unlike before, when Samsung LSI's main force used 45nm TSMC's 40nm half node, Samsung's 32nm mass production TSMC's 28nm half node (TSMC's 32nm only has R&D but not mass production), Samsung's 14nm and TSMC's 16nm specifications are also different, which is difficult to compare. There are also differences between HKMG or SiO2, gate last or gate first, which give customers different considerations on long-term technical trends. In the 10nm process generation, it is a direct competition: 1. cost, 2. performance, 3. power (leakage), 4. yield.

TSMC's technical choice of 7nm process

TSMC's 7nm process technology focus is to choose the next generation of FinFET new transistor structure and how to make the multiple exposure of immersive microfilm smoothly advance to 7nm without using EUV exposure. Compared with the previous research and development of one process after another, TSMC is developing a new 10nm process, and simultaneously launching the next generation of 7nm process technology. It is expected that 1Q17 will be process verification, and 7nm will be highly compatible with 10nm technical achievements and process equipment, and 90% of 10nm equipment can continue to be used in 7nm. And it can use the process capabilities learned by 10nm to quickly improve yields.

TSMC's 7nm will not use EUV equipment in large quantities, but EUV will be put into R&D and production in small quantities starting from 7nm, and will be used in large quantities in 5nm processes. Since TSMC's 7nm technology has not been determined, it is not known how advanced performance, pwoer, and density are compared with 10nm. TSMC believes that it is a relatively short node relative to 10nm, while 7nm, like 16nm, belongs to a technology node with a relatively long life cycle.

InFO technology allows TSMC to obtain 100% A10 orders, which will change the packaging industry ecosystem in the long run

TSMC's Wafer Level Package (WLP) technology originally developed CoWoS (Chip-on-Wafer-on-Substrate) technology. Due to the expensive yield and material costs, it is only used in a few high-end GPU and FPGA products. The InFO (Integrated Fan-Out) technology based on the industry Fan-Out packaging technology has achieved significant success in cost and yield. Compared with Flip Chip BGA/CSP, the advantages of InFO are as follows:

can be used in high pins. complex chips of count.
uses a Molding Panel or Reconstituted Wafer to replace the substrate used by traditional Flip Chip, which is cheap and has a thickness of more than 20%.
improves chip performance by 20%.
has more heat dissipation effect 10%

TSMC seems to have overcome various difficult yield problems in InFO, providing advanced AP with a thinner form factor, cheaper, and good reliability wafer-level packaging technology solution. It seems that TSMC's InFO technology has been developed and has passed Apple's verification. It is actively building production capacity in Longtan Packaging Factory. The first generation of InFO is expected to be mass-produced in 2Q16 and should be mass-produced with 16nm Apple A10 orders. It is expected that 4Q16 can contribute US$100M revenue. Although the revenue contribution ratio of

is not high, it can become a plus point for 10nm competition in Apple A10 AP. Even because TSMC InFO and Samsung LSI have completely different similar packaging technologies, chips (chip) form factors made with the same die are different. Unless space is reserved in the mobile phone, the A10 chip will not be distributed to two different packaging technologies for production. However, since the purpose of using InFO is to thin the chips, the thinned space will of course make full use of the thinned space in the mechanism design, and chips of different thicknesses produced by Samsung LSI will not be able to be distributed to TSMC and Samsung LSI like A9. Because of InFO technology, Apple A10 may have changed from two suppliers to TSMC to become the exclusive supplier. If it really happens, InFO will bring great benefits, not only the packaging itself has US$100M revenue, but also makes TSMC the exclusive supplier of A10.

If Apple successfully uses TSMC InFO in 2016, after 2017, other customers such as Qualcomm and MTK will inevitably follow up. The demand for InFO production capacity has increased significantly, and customers will also require a second source. It is judged that TSMC does not rule out the authorization of InFO technology to professional packaging factories for use. After all, TSMC's core business is wafer manufacturing, not packaging. In the long run, it will have a great impact on the IC Substrate industry, especially Flip Chip CSP manufacturers for mobile phones, followed by Flip Chip BGA manufacturers. Packaging manufacturers have the ability to develop their own wafer-level packaging technology, or can obtain InFO authorization, which has a relatively small impact. Immediately affected in 2016 are Apple’s AP carrier suppliers Ibiden and SEMCO.

TSMC is developing the second generation of InFO technology, which will be mass-produced in conjunction with the progress of 10nm and 7nm process technologies.

(The full text is not finished; this article is reproduced by authorized by Richard’s Research Blog; first image source: Dazhi Image)

extended reading:

analysis Taiwan semiconductor giant (I)─16nm Yield continues to improve, TSMC Kanwang next year

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