TSMC announced that they have completed infrastructure design for the 5nm process, further transistor density and performance. TSMC's 5nm starts to produce 1.7 times higher root density than 7nm, and the 5nm process is greatly improved compared to its 7nm process.

2025/07/0122:06:32 hotcomm 1170

Zhongguancun Online News: According to foreign media reports, TSMC announced that they have completed the infrastructure design of the 5nm process, further transistor density and performance. TSMC's 5-nanometer process will once again adopt EUV technology to improve yield and performance.

TSMC announced that they have completed infrastructure design for the 5nm process, further transistor density and performance. TSMC's 5nm starts to produce 1.7 times higher root density than 7nm, and the 5nm process is greatly improved compared to its 7nm process. - DayDayNews

TSMC 5nm starts risk production, 1.7 times higher than 7nm density

According to TSMC, the 5-nanometer process is greatly improved than its 7nm process. Taking the Arm Cortex-A72 core as an example, process improvements increase the logic density by 1.8 times, clock speed increases by 15%, and SRAM and analog circuit area decreases, which means that each wafer has more chips. The process is suitable for mobile, internet and high-performance computing applications. TSMC also provides online tools for silicon design process solutions that are optimized for 5 nm processes. According to reports, TSMC has now begun production risk.

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