The importance of chip is self-evident. The development of digital society has become the general trend. Chips play a role as the underlying foundation. The importance of chips is concentrated in the importance of chip performance. This is why chip manufacturing processes are now becoming the focus of attention, because improving chip manufacturing processes is a shortcut to improving chip performance.
And the reason is a shortcut is that no other better solution has been found. This situation has led to the rapid rise of TSMC and ASML. TSMC can provide the most advanced manufacturing process, while ASML can provide the lithography machine that supports the most advanced processes.
Although the advanced process solves the chip performance problem in the shortest time, the new problem was soon exposed, that is, the cost. The cost of advanced processes increases exponentially, whether from the design or manufacturing of chips. The increase is unbearable for even the world's top chip giants, such as Apple .
In terms of chip design, the 28-nanometer process only costs US$42.8 million, 7-nanometer process requires US$248.6 million, 3-nanometer already requires US$581.1 million, and 2-nanometer is expected to require US$724.8 million, so the design cost of a 3-nanometer chip is nearly 14 times that of the 28-nanometer process, exceeding RMB 4 billion.
In chip manufacturing, the price of 28-nanometer wafers is US$3,000, 7 nanometers is US$10,000, 5 nanometers is US$16,000, 3 nanometers is US$20,000, and the cost of 3-nanometer wafers is about 7 times that of 28 nanometers. The problems exposed by this cost are also beginning to be revealed on lithography machines.
ASML has already stated this year that lithography technology seems to have come to an end in the next generation of high-NA EUV lithography machines. It’s not that it cannot be done technically, but the cost is unbearable. The NA of the lithography machine can continue to increase, but the cost will be higher than the sky.
So the industry has begun to look for ways to reduce dependence on advanced processes, and has achieved good results, namely core particles and advanced packaging technology. Our current chips are essentially homogeneous and isomorphic, that is, they use the same material and the same chip architecture. The core particle technology adopts different chip architectures, and uses advanced packaging in the back-end link of chip manufacturing, and then integrates chips of different architectures together to form a "big chip", so the core particle is also called "small chip" technology. The combination of the two technologies of
has reduced the adoption of advanced processes to a certain extent, because this new technology not only reduces the cost, but also improves chip performance. In essence, it is because it plays a key role in the chip design link. Now, Fudan University has achieved a breakthrough in the underlying technology of the chip, that is, transistor technology.
Simply put, Fudan University has successfully implemented a CFET transistor. The current application feature of this transistor is that it can double its integration degree, which is the same as improving the chip manufacturing process, because the purpose of improving the process is to improve the integration degree of the transistor.
In fact, just in the middle of this year, TSMC stated that it would take CEFT transistor technology as its focus for future development and CFET as the successor of GAAFET. GAAFET is a transistor technology with 3-nanometer and 2-nanometer processes. FinFET transistors were used before 3-nanometers, and Intel is also vigorously developing CEFT transistors.
Therefore, we can see that combining core particles, CFETs and advanced packaging can realize heterogeneous heterogeneous chips. Compared with homogeneous and homogeneous chips that rely on advanced processes, heterogeneous heterogeneous chips do not have a disadvantage in performance, but they have a huge advantage in cost.The one that is most affected by
should be ASML, because the market's dependence on EUV lithography machines will be reduced. In fact, after the core particle and advanced packaging technology are applied, this dependence on EUV lithography machines has decreased. For example, neither Intel's European factory nor TSMC's American factory purchased new EUV lithography machines, but instead used the old equipment of old factories through the form of transferring machines, that is, using old equipment from old factories. TSMC even reduced the capacity of for 3-nanometer process by by about 80%, and a new factory with 7-nanometer process was also cancelled.
On the contrary, TSMC has begun to actively expand mature process factories such as 28nm. This is just the beginning of homogeneous and heterogeneous chips being used, and this trend will become more obvious after mass production of heterogeneous and heterogeneous chips. ASML may not have expected that China's development in chip technology will be so fast, because in CFET transistor technology, ASML's ally Belgian Microelectronics also regards this as the future technological development direction, but Fudan University has now achieved it.
At present, we have made great progress in the lithography machines in the front and rear lithography machines in chip manufacturing, and have also kept up with the pace of the times in core particle technology and advanced packaging. Now the implementation of CEFT transistor technology will undoubtedly lead domestic chips to another level, and we will wait and see.
