Compiled by Core East and West (public account: aichip001) | Edited by Gao Ge | Yunpeng Core East and West reported on January 27 that Micron announced its 1α new process for DRAM on Tuesday. This technology is expected to increase DRAM bit density by 40% and reduce power consump

core thing (public account: aichip001)

compilation | Gaoge

editor | Yunpeng

core thing News on January 27, Micron announced its 1α new process for DRAM on Tuesday, which is expected to increase the bit density of DRAM 40%, power consumption reduced by 15%. The

1α process was initially used to produce DDR4 and LPDDR4 memory, but may cover all types of Micron DRAM in the future.

At the same time, Micron mentioned that it is still difficult to achieve scale of DRAM. Since the performance optimization brought by EUV technology cannot offset equipment costs and production difficulties, Micron does not plan to introduce EUV lithography technology in the near future and is considering applying EUV technology in the future 1𝛿 process.

1. Micron’s 1α process bit density may increase by 40%

So far, Micron has transferred a large part of its DRAM production to its 1Z process, which provides higher bit density and performance for producing memories, which can effectively significantly reduce costs. So right now, Micron says it's pretty happy with its margins and its product mix.

Micron’s 1α process technology is expected to increase the bit density by 40% over 1Z, which will correspondingly reduce manufacturers’ single-byte storage costs. In addition, the technology is said to reduce power consumption by 15% to improve memory performance.

About 10% of the 40% bit density increase in Micron's 1α process is driven by DRAM design efficiency, indicating that there is room for improvement in non-EUV technology in the current production process. The new 1α process of

will continue to use the 6F2 bit line design like the 1Z process. At present, Micron has implemented many new processes to adapt to the manufacturing of small-size DRAM.

Thy Tran, Vice President of Micron DRAM Process Integration, said in an interview with the media that the bit density of the 1α process can be significantly improved because of the improvement of the process and the improvement of design efficiency. This has improved the matrix efficiency and also brought about Memory performance improvement of about 10%.

Micron has made many improvements to process technology, such as greatly reducing the bitline, wordline and grid. Micron is able to do this not only because of its enthusiasm for new processes, but also because it integrates the latest and best materials from around the world, such as better conductor materials and insulator materials.

Finally, Micron makes devices by depositing, modifying or selectively etching these new materials, shrinking the pitch to make the battery capacitors larger. In addition, Micron has also introduced advanced equipment and technology to improve the patterned layer. The new process of

DRAM 1α was completed at the Micron headquarters in Boise, Idaho, USA, but the development and manufacturing process of the process involved multiple teams around the world.

Scott DeBoer, executive vice president of technology and products at Micron Technology, said that DRAM devices using the new 1α process will solve many problems when used in data centers, edge AI and consumer electronics.

Initially, Micron will use the 1α process to produce 8GB and 16GB DDR4 and LPDDR4 memory in its wafer fabs in Taoyuan and Taichung, and eventually this process will be applied to all types of memory.

Because DDR5 storage devices will have a more complex architecture, processes like 1α are particularly important for the next generation of DDR5 storage devices. Mr.

Tran said: "Our 1α process will be gradually deployed in our product portfolio and will become the main process in 2022. At the same time, the wafer fab will also be gradually upgraded to cooperate with production and meet industry needs."

2. Memory The upgrade of technology will be a huge challenge to the existing process.

In recent years, storage technology has developed greatly due to higher performance requirements.

The representative DDR5 and GDDR6X memories are much more complex than the previous DDR4 and GDDR6 memories. This is why DRAM technology needs to be upgraded.

The emergence of new storage technology will always require the transformation of existing processes. Memory chip companies like Micron need to invest more money in upgrading process technology.

In this regard, Micron’s senior vice president of technology development, Naga Chandrasekaran, said that the demand for higher-performance memory will always exist, and Micron has the ability to meet this through process and design innovation.

For example, although the new generation of DDR5 can reduce power consumption and provide higher bandwidth, this high-performance requirement also puts forward new requirements for chip size. Simple size scaling will not be able to meet production needs.

It is extremely challenging to reduce memory costs while meeting higher performance requirements, which requires innovation in multiple areas beyond the process. Chandrasekaran mentioned that while Micron met the performance requirements of DDR5, it also considered cost factors. Cases like

are not unique. As DRAM processing technology starts to become thinner, companies like Micron must find the right balance between cost, performance, quality and power consumption.

Process nodes of Micron's DRAM advanced process

Chandrasekaran said: "DRAM scaling will become more challenging, especially when we have to fight against extremely tight profit margins, while also optimizing the memory's component cost, power consumption, Performance and quality. "

3. Micron will not use EUV lithography technology in the near future

One of the ways to solve memory geometry scaling is to use EUV lithography technology, but Micron is not planning to introduce this technology in the near future because EUV cannot Solve many of the problems they currently face.

Micron will continue to use deep ultraviolet (DUV) lithography for its next three DRAM nodes, but they are considering EUV technology in the 1𝛿 process.

Meanwhile, even without EUV, Micron has promised to improve the performance and power consumption of next-generation memory devices.

"Micron will continue to innovate in materials, processes and equipment to meet the needs of scale." Chandrasekaran said, "We are developing relevant technologies."

He also said that EUV technology is not a necessity for Micron at present, and they are developing multi-pattern Technology patents and innovations can meet the performance and cost requirements of new technologies.

Micron believes that in the next few years, because EUV technology is still in the early stages of DRAM production, the process improvements it brings will be offset by equipment costs and production difficulties. For example, a slide recently presented by Micron showed that EUV technology is currently too expensive, has negligible scalability benefits, imperfect critical dimension (CD) uniformity, and does not significantly reduce cycle times. Production efficiency still lags behind DUV technology.

The time node when EUV technology may be used in the production of DRAM memory chips

Naga Chandrasekaran said: "The current production of EUV technology in memory is still not comparable to advanced immersion technology. EUV is not necessarily the key to large-scale production. Factors, Micron’s existing technology is sufficient to ensure product performance.”

He also mentioned that although EUV technology is being improved, its cost and performance still lag behind the current production model. However, within the next three years, EUV technology may make necessary progress in terms of cost and performance.

Therefore, Micron will continue to promote attention to this technology and introduce this technology at the appropriate time that meets the requirements.

In this case, the 1β and 1𝛾 processes under development will not use any EUV equipment. Instead, the company will continue to use existing production technology and assign its engineers to design DRAM devices that are competitive in terms of bit density, power consumption and performance.

Micron introduces a new process technology approximately every year. According to foreign media estimates, its 1𝛿 process will be launched in 2024 or later. This means that Micron may be four years behind Samsung, the world's largest memory manufacturer, in using EUV technology, which has advantages and disadvantages.

Micron will use mature EUV equipment, coatings and resists. Accordingly, it will have to use EUV technology across multiple layers without experience in mass production with EUV technology.

Conclusion: Micron's conservative attitude may be due to cost considerations

As one of the world's largest memory chip manufacturers, Micron represents the progressive trend of storage technology to a certain extent, so its technological breakthroughs are of great significance.

At present, the monopoly of the global memory chip market continues to intensify. The top three leaders in the industry are Samsung, SK Hynix and Micron.Most of the DRAM market is occupied by Samsung, SK Hynix and Micron of the United States, while the NAND Flash market is almost entirely divided between Samsung, SK Hynix, Japan's Toshiba, SanDisk, Micron and Intel, among which Samsung is the monopoly status.

Due to the particularity of memory chips, its design is relatively simple. Therefore, the line width, production capacity, yield rate and depreciation of the product are the core of the production cost. Under this circumstance, Micron's conservative strategy for EUV technology also has corresponding practical significance.

Source: Tom’s Hardware