Apple 's chip is preparing to move towards the 3nm process node, but Apple's specific process selection remains to be discussed. Although TSMC (TSMC) plans to mass-produce the first generation of N3 processes in the second half of this year, and Intel has a shortage of production capacity due to Meteor Lake, Apple seems to have retained it and has not chosen to place orders on a large scale.
According to Nikkei, Apple's current goal is to become the first manufacturer to use TSMC's N3E process next year, and use it on M3 and A17 Bionic, which belongs to the second generation of N3 process, which indirectly reflects that the first generation of N3 process is not that popular. The M3 will be used for future Mac and iPad products, while the A17 Bionic will be used for iPhone 15 Pro and iPhone 15 Pro Max.
Apple's M2 Pro and M2 Max may choose the first generation of N3 technology, which is equipped with the more high-end MacBook Pro model. However, there have been reports recently that the M2 Pro and M2 Max may still have 5nm chips, and Apple has cut orders for the new 14/16-inch MacBook Pro models, with shipments expected to be reduced by 20% to 30%. Next year, Apple will continue its existing strategy on the iPhone 15 series, launching iPhone 15 and iPhone 15 Plus, which is still equipped with A16 Bionic. The A17 Bionic, manufactured with 3nm process, will only be supplied to high-end Pro models.
It is understood that N3E reduces the number of EUV mask layers on the basis of N3, from 25 to 21 layers, with a logic density of 8% lower, but it is still 60% higher than the N5 process node. Previous reports said that its mass production time may be advanced from the second half of 2023 to the second quarter of 2023. In addition, TSMC still uses FinFET (finfield effect transistor ) at the 3nm process node, but FINFLEX technology can be used to expand the performance, power and density range of the process, allowing chip designers to use the same design tool set to select the best options for each key functional block on the same chip, further improving PPA (power, performance, area).
