Finally, on the last day of the first half of 2022, Samsung announced the mass production of 3nm chips, becoming the world's first manufacturer to mass-produce 3nm chips, achieving Samsung's first small goal-to lead TSMC and fulfill itself Promise of.
At the same time, Samsung also said that compared with its own 5nm chip, the performance of 3nm chips has improved by 23%, power consumption has been reduced by 45%, and the chip area has been reduced by 16%.
I have to say that these values are also very good, especially the 45% reduction in power consumption, which makes downstream customers excited. After all, when the chip reaches 5nm, the power consumption increases significantly, which has caused headaches for manufacturers.
, especially Qualcomm , since the chip entered 5nm, due to too much power consumption, the heat generation has also increased, so Snapdragon 888 and Snapdragon 8Gen1 have won the "Fire Dragon title".
If 3nm can reduce power consumption by 45%, Qualcomm must be one of the most excited manufacturers, because there is a way to "train the dragon" and the "fire dragon" can be saved.
So the question is, why can Samsung’s 3nm process reduce power consumption by 45%? The reason is that Samsung uses GAAFET transistor technology, while previously it used FinFET transistor technology from 14-4nm.
For a chip, the power consumption is divided into two parts, one part is dynamic power consumption, and the other part is static power consumption ( is also called leakage power consumption ).
dynamic power consumption refers to the power consumption of the chip itself when performing calculations. The static power consumption is the power consumption leaked when the current passes through the transistor after the chip is powered on.
Don’t underestimate static power consumption. Static power consumption is the big one, accounting for more than 60% of the total power consumption of a chip. wafer factory has been fighting against static power consumption (leakage power consumption), such as Intel has been saying that its leakage power has been reduced. TSMC used to have the title of "Taiwan Leakage" because it was poorly controlled in this area.
When using GAAFET transistor technology, due to the more advanced technology, compared to FinFET technology, the voltage applied to the transistor (threshold voltage) becomes smaller. Let's recall the junior high school physics knowledge, power = current X voltage.
When the voltage becomes smaller, does the power consumption become smaller? Since the threshold voltage of GAAFET is 30-50% lower than that of FinFET, the static power consumption is theoretically reduced by 30-50%.
Coupled with the more refined 3nm process, the dynamic power consumption will also be reduced, and the GAAFET transistor technology itself will have slightly better leakage, so it finally achieved a 45% reduction in power consumption.
Samsung also said that the second-generation 3-nanometer GAA manufacturing process is also under development. The second-generation process will reduce chip power consumption by up to 50%, increase performance by 30%, and reduce area by 35%.
It can be said that Samsung’s 3nm process is really more advantageous than TSMC’s 3nm, which still uses FinFET process.
Considering that TSMC has already tied up with , apple, , AMD and other manufacturers, in order to seize TSMC’s market, Samsung is embracing Chinese manufacturers this time. According to media reports, Shanghai Pan Silicon Semiconductor will become one of its initial customers. In addition, There are more Chinese companies that may take the lead in cooperating with Samsung on 3nm.
I don’t know how TSMC will respond next. Based on FinFET technology, it was already lagging behind, and now it is lagging behind again. TSMC is already at a disadvantage.
depends on whether Samsung's 3nm yield is high or not. If the yield is high and the performance is good, this may really have a chance to turn around, just like Samsung was the first to realize 14nm in FinFET technology.
