April 27 news, TSMC updated its process technology roadmap on Tuesday, saying that its 4-nanometer process chips will enter the "risk production" stage at the end of 2021 and achieve mass production in 2022; 3-nanometer products are expected to be launched in 2022 Production will start in the second half of the year, and the 2nm process is under development.
In terms of production capacity, no competitor can threaten TSMC's dominance, and there won't be in the next few years. As for manufacturing technology, TSMC recently reiterated that it is confident that its 2 nanometer (N2), 3 nanometer (N3) and 4 nanometer (N4) processes will launch on time and maintain a lead in more advanced node processes than competitors.
Earlier this year, TSMC significantly increased its capital expenditure budget for 2021 to $25 billion to $28 billion, and more recently to about $30 billion. This is part of TSMC’s plan to increase production capacity and R&D investment over the next three years, with the company planning to invest a total of US$100 billion over three years.
About 80% of TSMC’s $30 billion capital budget this year will be used to expand production capacity of advanced technologies, such as 3 nanometer, 4 nanometer, 5 nanometer, 6 nanometer and 7 nanometer chips. Analysts at China Renaissance believe that most of the money on advanced nodes will be used to expand TSMC's 5-nanometer production capacity to 110,000 to 120,000 wafers per month by the end of this year.
Meanwhile, TSMC said 10% of its capital expenditures will be used for advanced packaging and mask manufacturing, and another 10% will be used to support specialized technology development, including customized versions of mature nodes.
TSMC’s latest move to boost capital spending comes after Intel announced its IDM 2.0 strategy involving in-house production, outsourcing and foundry operations, and largely reiterates the company’s focus on increasing competition amid heightened competition. Confidence in the short and long term future.
TSMC President and CEO Wei Zhejia said in a recent conference call with analysts and investors: "As a leading wafer foundry , TSMC has never lacked competition in its more than 30-year history, but we Know how to compete. We will continue to focus on providing leading technology, excellent manufacturing services, and winning the trust of our customers. It is very important to win the trust of our customers because we have no in-house products to compete with our customers.”
N5 Process wins customer trust
TSMC was the first company to begin high-volume chip manufacturing (HVM) using its N5 process technology in mid-2020. Initially, this node will be used only to serve TSMC's most important customers, namely apple and HiSilicon . Today, adoption of this node is growing as more customers have their N5-formatted chip designs ready. Meanwhile, TSMC said it has more customers planning to use its N5 series of technologies, including N5, N5P and N4, than it expected just a few months ago.
Wei Zhejia said: "N5 has entered its second year of mass production, and production volume is higher than our original plan. Driven by smartphones and high-performance computing (HPC) applications, demand for N5 continues to be strong, and we expect that in 2021 N5 will contribute about 20% of wafer revenue. In fact, we see N5 and N3. There are more and more customers. The demand is so high that we must be prepared to respond.”
For TSMC, HPC applications include many different types of products, such as AI accelerators, CPU, GPU, FPGA, NPU and video games. SoC etc. Since TSMC is only a contract manufacturer, it won't reveal which node it uses for the products it makes, but the fact that N5 adoption is growing in the HPC space is important.
Wei Zhejia said: "We expect demand for our N5 series to continue to grow in the next few years, driven by strong demand for smartphones and HPC applications. We expect HPC to not only be present in the first wave of growth, but actually to Coming in a wave of more demand to support our future leading N5 node."
It's not particularly surprising that TSMC N5 is gaining market share among cutting-edge technology adopters. China Renaissance analysts estimate that TSMC N5's transistor density is about 170 million transistors per square millimeter, which would make it the highest-density technology available today. By comparison, Samsung Electronics 's 5LPE can accommodate approximately 125 million to 130 million transistors per square millimeter, while Intel's 10nm node transistor density is approximately 100 million per square millimeter.
In the coming weeks, TSMC will begin manufacturing chips using a performance-enhanced version of its N5 improvement technology called N5P, which promises to increase frequency by up to 5 percent or reduce power consumption by up to 10 percent. N5P provides customers with a seamless migration path that does not require significant investments in engineering resources or longer design cycles, so anyone designing with N5 can use N5P. For example, early adopters of the N5 can repurpose their IP into the N5P chip.
N4 will be put into mass production next year
TSMC’s N5 series of technologies also includes N4 process chips that will enter the “risk production” stage later this year and will be used for mass production in 2022. This technology will provide more PPA (power, performance, area) advantages than N5 but maintain the same design rules, design infrastructure, SPICE simulation programs and IP. At the same time, because N4 further expands the scope of EUV lithography tools, it also reduces the number of masks , process steps, risks and costs.
Wei Zhejia said: "N4 will leverage the strong foundation of N5 to further expand our 5nm series technology advantages. N4 is a direct migration from N5 and has compatible design rules, while providing further performance, Power and density enhancement. N4 aims to enter risk production in the second half of this year and achieve mass production in 2022. TSMC will have approximately two years of N5 experience and three years of EUV experience when the product enters volume production. Therefore, the expectation is that its yield will be high. However, even if N4 is considered cutting-edge, it won't be the most advanced manufacturing technology TSMC offers next year.
N3 will debut in the second half of 2022
In 2022, TSMC will launch its new N3 manufacturing process, which will continue to use FinFET transistors but is expected to provide a full set of PPA improvements. In particular, TSMC's N3 promises a 10%-15% increase in performance or a 25%-30% reduction in power consumption compared to the current N5 process. At the same time, the new node will also increase transistor density by 1.1 to 1.7 times, depending on the structure.
N3 will further increase the number of EUV layers but will continue to use DUV lithography. In addition, since this technology has always used FinFET, it will not require redesigning a new generation of electronic design automation (EDA) tools and developing entirely new IP from scratch, which may be more efficient than Samsung based on GAAFET/MBCFET 3GAE. Competitive advantage.
Wei Zhejia said: "N3 will be another comprehensive node leap for us after N5. It will use FinFET transistor structure to provide our customers with the best technology maturity, performance and cost. Our N3 technology development is making good progress. With We continue to see much higher customer engagement for HPC and smartphone applications with N5 compared to N7.”
In fact, TSMC claims that customer engagement with N3 is increasing, which indirectly demonstrates its commitment to N3. N3 has high hopes. Wei Zhejia said: "Risk production of N3 is expected to start in 2021, and the mass production target is in the second half of 2022. After the launch of our N3 technology, it will become the most advanced foundry technology in PPA and transistor technology. We are confident that, Both our N5 and N3 will become TSMC's large-scale and long-lasting node processes, surpassing N3
all-gate field effect transistors (GAAFET). It remains an important part of TSMC’s development roadmap. The company is expected to use entirely new transistors in its "post-N3" technology (presumably N2). In fact, TSMC is in the process of finding next-generation materials and transistor structures that will be used for many years to come.
TSMC stated in its recent annual report: "For advanced CMOS (complementary metal oxide semiconductor), TSMC's 3-nanometer and 2-nanometer CMOS nodes are progressing smoothly on the pipeline." In addition, TSMC's enhanced exploratory R&D efforts are focused on 2nm nodes, 3D transistors, new memories and Low-R Areas such as interconnection, which are laying a solid foundation for the introduction of many technology platforms .
It is worth noting that TSMC is expanding its R&D capabilities at Fab 12 and is currently developing N3, N2 and more advanced nodes.
is confident of exceeding the overall growth rate of the foundry industry
Overall, TSMC believes that its "everyone's foundry" strategy will allow it to further grow in terms of scale, market share and sales. The company also expects to maintain its technology leadership going forward, which is critical to its growth.
TSMC Chief Financial Officer Huang Wende recently said in a conference call with analysts and investors: "We now forecast that for the full year of 2021, the growth rate of the foundry industry will be approximately 16%. For TSMC, we are confident that we can Surpass the overall growth of the foundry industry to achieve 20% in 2021 growth around."
The company has a strong technology roadmap and will continue to launch improved leading-edge nodes every year, delivering technology improvements to customers at a predictable pace.
TSMC knows how to compete with rivals with cutting-edge nodes and chipmakers focused on specialized process technologies, so it doesn't view Intel Foundry Services (IFS) as a direct threat, especially since the latter is primarily focused on cutting-edge and Advanced nodes.
Financial analysts generally agree with TSMC's optimism, mainly because the company's N3 and N5 nodes are not expected to have competitors offering similar transistor density and wafer capacity.
Huaxing Securities analysts said: "Following the return of Intel's foundry business announced in March this year, TSMC is willing to formulate a three-year capital expenditure and R&D investment plan of US$100 billion starting in 2021, which shows that it is confident to expand Foundry leadership. We believe TSMC's strategic value is rising with the emergence of N3 and N5: strong N5 production activity for HPC and smartphone applications, alongside N5 and N7 N3 customers are more engaged than at similar stages”
.-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-