The Paper reporter Zhou Ling comprehensively reported on
Seoul, South Korea, Samsung headquarters building. People's Vision Data Map
html On June 22, Samsung Electronics denied the report of the local Korean media " East Asia Daily " about delaying the mass production of 3 nanometers. A Samsung spokesperson said by phone that Samsung is still on schedule to start mass production of 3-nanometer chips in the second quarter.The Dong-A Ilbo previously reported that Samsung’s 3-nanometer mass production will be delayed again because the yield rate is far below the target.
html On June 21, Korean media BusinessKorea reported that in order to catch up with TSMC, Samsung has increased its bets on 3-nanometer surround gate technology (GAA). It hopes to establish a 3-nanometer chip process with GAA technology in the next three years and mass-produce it in 2025. 2nm wafer based on GAA process.BusinessKorea reported that Samsung was rumored to have introduced the 3-nanometer GAA process in early June for trial mass production, becoming the first company to use GAA technology. It hopes that the technology can achieve a quantum-level leap and shorten the gap with TSMC.
Samsung’s strategy is to apply GAA technology to the 3-nanometer process in the first half of this year, and plans to introduce GAA technology into the second-generation 3-nanometer chip next year. TSMC’s strategy is to enter the 3-nanometer semiconductor market in the second half of this year with a stable FinFET process.
TSMC recently disclosed that the company’s 2-nanometer process will begin mass production in 2025. Samsung hopes to bet on 3-nanometer surround gate technology (GAA) technology. It will complete the 3-nanometer wafer process based on GAA technology in the next three years, and mass-produce 2-nanometer wafers based on the GAA process in 2025. By then, the two companies will simultaneously mass-produce the most advanced 2-nanometer process.
According to BusinessKorea, GAA is a next-generation process technology that improves the structure of semiconductor transistors, allowing the gate to contact the four sides of the transistor , compared to the current fin field effect transistor (FinFET) which can only contact the transistor. In the case of three sides, the GAA structure can control the current more accurately than the FinFET process. Samsung is betting on applying GAA technology to the 3nm process in order to catch up with TSMC.
It is reported that Samsung’s 3-nanometer process improves semiconductor performance and battery efficiency by 15% and 30% respectively. At the same time, compared with the 5-nanometer process, the chip area is reduced by 35%.
Editor in charge: Dongdong Picture editor: Chen Feiyan
