B2 stepping Ryzen 5000 appeared:
The B2 stepping Ryzen 5000 that came out in May this year finally has new news, including ASUS, MSI, ASRock etc. Many manufacturers have confirmed the existence of the new stepping of B2 through the motherboard CPU compatibility list.
The new B2 stepping does not have any bug fixes or performance changes. It only optimizes the manufacturing process. AMD can produce more ZEN 3 chips on the B2 stepping than the current B0 stepping. The good news is that the B2 stepping Ryzen 5000 processor can be supported without requiring everyone to update the motherboard BIOS.
In addition, Planet3DNOW also believes that the B2 stepping introduced by Ryzen 5000 may have a certain relationship with the 3D V-Cache technology that will be used in Ryzen 6000. AMD may already be upgrading the manufacturing process to adapt to the future. 3D cache stacking requirements.
PCIe Re-acceleration: the 6.0 specification is nearing completion
The pace of PCIe acceleration has accelerated again. PCI-SIG has just announced version 0.9 of the PCIe 6.0 specification, which is only one step away from the final version. . The release of version 0.9 means that companies can already start developing related products, and there will be no functional changes in the final version of the specification.
Each PCIe specification has multiple important release nodes: version 0.3 of PCIe 6.0 was released in 2019,The draft describes the goals (for example, the goal of PCIe 6.0 is 64GT/s data transfer rate) and the methods to be used to achieve these goals (for example, PCIe 6.0 will use PAM4 signaling and FEC forward error correction).
The 0.5 version launched in February 2020 as the first draft, completely solves the goals set in version 0.3 and includes all the requirements of the architecture. PCI-SIG members can continue to add new features to it.
The 0.7 version released in November 2020 is a "complete draft". After this version, there will be no more new functions, and the work shifts to testing chips and verifying electrical specifications. The 0.9 version launched this time will be the final draft, and PCI-SIG members will conduct internal evaluations of the technology and obtain intellectual property rights. The bandwidth of the
PCIe 6.0 x16 interface will reach 256GB/s, and the backward compatibility is maintained. Intel Alder Lake, which will be on the market next month, will support PCIe 5.0 for the first time, but there may not be many PCIe 5.0 devices for a period of time. As for PCIe 6.0, it may take three to five years to enter the practical state.
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